Transistors can be divided into two main types: bipolar junction transistors and field-effect transistors. Both types share a common structure comprising three electrodes with a semi-conductive material disposed therebetween in a channel region. The three electrodes of a bipolar junction transistor are known as the emitter, collector and base, whereas in a field-effect transistor the three electrodes are known as the source, drain and gate. Bipolar junction transistors may be described as current-operated devices as the current between the emitter and collector is controlled by the current flowing between the base and emitter. In contrast, field-effect transistors may be described as voltage-operated devices as the current flowing between source and drain is controlled by the voltage between the gate and the source.
Transistors can also be classified as p-type and n-type according to whether they comprise semi-conductive material which conducts positive charge carriers (holes) or negative charge carriers (electrons) respectively. The semi-conductive material may be selected according to its ability to accept, conduct, and donate charge. The ability of the semi-conductive material to accept, conduct, and donate holes or electrons can be enhanced by doping the material. The material used for the source and drain electrodes can also be selected according to its ability to accept and injecting holes or electrodes.
For example, a p-type transistor device can be formed by selecting a semi-conductive material which is efficient at accepting, conducting, and donating holes, and selecting a material for the source and drain electrodes which is efficient at injecting and accepting holes from the semi-conductive material. Good energy-level matching of the Fermi-level in the electrodes with the HOMO level of the semi-conductive material can enhance hole injection and acceptance. In contrast, an n-type transistor device can be formed by selecting a semi-conductive material which is efficient at accepting, conducting, and donating electrons, and selecting a material for the source and drain electrodes which is efficient at injecting electrons into, and accepting electrons from, the semi-conductive material. Good energy-level matching of the Fermi-level in the electrodes with the LUMO level of the semi-conductive material can enhance electron injection and acceptance. Ambipolar devices that can function as n or p-type are also known.
Transistors can be formed by depositing the components in thin films to form a thin film transistor (TFT). When an organic material is used as the semi-conductive material in such a device, it is known as an organic thin film transistor (OTFT).
Various arrangements for organic thin film transistors are known. One such device is an insulated gate field-effect transistor which comprises source and drain electrodes with a semi-conductive material disposed therebetween in a channel region, a gate electrode disposed adjacent the semi-conductive material and a layer of insulting material disposed between the gate electrode and the semi-conductive material in the channel region.
OTFTs may be manufactured by low cost, low temperature methods such as solution processing. Moreover, OTFTs are compatible with flexible plastic substrates, offering the prospect of large-scale manufacture of OTFTs on flexible substrates in a roll-to-roll process.
An example of such an organic thin film transistor is shown in FIG. 1. The illustrated structure may be deposited on a substrate 1 and comprises source and drain electrodes 2, 4 which are spaced apart with a channel region 6 located therebetween. An organic semiconductor (OSC) 8 is deposited in the channel region 6 and may extend over at least a portion of the source and drain electrodes 2, 4. An insulating layer 10 of dielectric material is deposited over the organic semi-conductor 8 and may extend over at least a portion of the source and drain electrodes 2, 4. Finally, a gate electrode 12 is deposited over the insulating layer 10. The gate electrode 12 is located over the channel region 6 and may extend over at least a portion of the source and drain electrodes 2, 4.
The structure described above is known as a top-gate organic thin film transistor as the gate is located on a top side of the device. Alternatively, it is also known to provide the gate on a bottom side of the device to form a so-called bottom-gate organic thin film transistor.
An example of such a bottom-gate organic thin film transistor is shown in FIG. 2. In order to more clearly show the relationship between the structures illustrated in FIGS. 1 and 2, like reference numerals have been used for corresponding parts. The bottom-gate structure illustrated in FIG. 2 comprises a gate electrode 12 deposited on a substrate 1 with an insulating layer 10 of dielectric material deposited thereover. Source and drain electrodes 2, 4 are deposited over the insulating layer 10 of dielectric material. The source and drain electrodes 2, 4 are spaced apart with a channel region 6 located therebetween over the gate electrode. An organic semiconductor (OSC) 8 is deposited in the channel region 6 and may extend over at least a portion of the source and drain electrodes 2, 4.
One problem with the aforementioned arrangements is how to contain the OSC within the channel region when it is deposited. A solution to this problem is to provide a patterned layer of insulating bank material 14 defining a well in which the OSC 8 can be deposited from solution by, for example, inkjet printing. Such an arrangement is shown in FIGS. 3 and 4 for bottom and top gate organic thin film transistor respectively. Again, in order to more clearly show the relationship between the structures illustrated in FIGS. 1 and 2, with those illustrated in FIGS. 3 and 4, like reference numerals have been used for corresponding parts.
In particular, the periphery of the well defined by patterned layer of insulating material 14 surrounds some or all of the channel 6 defined between the source and drain electrodes 2, 4 in order to facilitate deposition of the OSC 8, for example, by inkjet printing. Furthermore, as the insulating layer 14 is deposited prior to deposition of the OSC 8, it may be deposited and patterned without damaging the OSC. The structure of the insulating layer 14 can be formed in a reproducible manner using known deposition and patterning techniques such as photolithography of positive or negative resists, wet etching, dry etching, etc.
The present applicant has found that even if a patterned layer of well-defining bank material is provided, problems still exist in containing the OSC within the channel region and providing good film formation of the OSC in the channel region using solution processing techniques for deposition of the OSC. Uncontrollable wetting of the well-defining bank material occurs since the contact angle of organic solvents in which the OSC is typically deposited is low. In the worst case the OSC may overspill the well.
It is known that the wettability can be controlled by the application of surface treatment steps such as plasma treatments. However, it is also known that such surface treatments can damage the active layers of the OTFT exposed in the well. For example, it is known that exposure of gate dielectric to plasma treatments can damage the dielectric. In fact, the present applicant has conducted their own experiments to confirm that this was the case by forming bottom-gate OTFT devices as illustrated in FIG. 2 wherein the dielectric layer was exposed to a plasma treatment prior to depositing the organic semiconductor material from solution using a spin-coating technique. The performance of these devices was compared with corresponding devices in which no plasma treatment was applied to the dielectric during manufacture. The results clearly indicated that the performance of OTFT devices in which the dielectric had been exposed to a plasma treatment during manufacture was severely degraded. As such, the present applicant developed a technique in which a protective “plug” was deposited over the dielectric prior to plasma treatment in order to protect the dielectric layer from damage.
Another problem with the aforementioned arrangements is how to provide good charge carrier mobility in the organic semiconductor material. The conductivity of the channel can be altered by the application of a voltage at the gate. In this way the transistor can be switched on and off using an applied gate voltage. The drain current that is achievable for a given voltage is dependent on the mobility of the charge carriers in the organic semiconductor in the active region of the device (channel between the source and drain electrodes). Thus, in order to achieve high drain currents with low operational voltages, organic thin film transistors must have an organic semiconductor which has highly mobile charge carriers in the channel region.
The application of organic thin film transistors is currently limited by the relatively low mobility of organic semiconductor materials. It has been found that one of the most effective means of improving mobility is to encourage the organic material to order and align. This minimizes intermolecular spacing and encourages inter-chain hopping which is the predominant conduction mechanism in organic semiconductors. The highest mobility organic semiconductor materials in thin film transistors show substantial ordering and crystallization, which is evident from optical micography and X-ray spectroscopy.
It is an aim of embodiments of the present invention to address the problems outlined above. In particular, it is an aim of certain embodiments to improve charge mobility in the organic semiconductor layer of an OTFT and also improve containment and film formation of the organic semiconductor material when deposited from solution.